An opportunity is available for a Semiconductor Yield / Defect Engineer (Wafer Fab with SEM Defect Review) expertise to support AI development and evaluation projects. There are currently 5 openings available.
Job Responsibilities
- Conduct SEM (Scanning Electron Microscope) defect review and accurate classification of defects observed in wafer fabrication processes.
- Interpret and analyze yield loss mechanisms, correlating defect patterns with process-related issues.
- Evaluate excursion events and make informed lot-hold or release recommendations based on empirical evidence and industry best practices.
- Review, interpret, and annotate wafer sort and test floor data, including bin maps and parametric datasets.
- Identify defect paretos and contribute to source attribution analysis to trace root causes.
- Document observations, communicate technical findings, and provide actionable feedback in clear, concise written and verbal formats for integration into AI learning modules.
Compensation: $20 - $60/hr.
Location / Region: Remote.
Relevant skills include:
- Sem defect review and classification
- Yield analysis and excursion / lot-hold decisions
- Wafer sort and test floor data
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